The present invention relates to a method for forming a metal line of a semiconductor device, more particularly to a technology of a metal line, which is included within highly integrated semiconductors, in order to electrically connect devices or lines.
Generally, a semiconductor device is manufactured by injecting dopants into a certain region in a silicon wafer or by depositing new material on it in order to achieve given purposes. As a typical example, there is a semiconductor memory device.
A semiconductor memory device includes a number of components such as transistors, capacitors, resistors or the like in order to perform certain purposes. Each of components is connected to one another through a conductive layer to exchange data or signals.
As well known, aluminum having a very high electrical conductivity has been mainly used as a material for a metal line as well as filling material for a contact hole that provides an electrical connection between elements forming a semiconductor device.
However, as a width of the contact hole has been reduced and a depth of the contact hole has been deeper due to the increasing integration of a semiconductor device, it becomes difficult to completely fill a fine-structured contact hole with aluminum.
Therefore, in order to solve a problem of this contact hole filling, there has been proposed a technique for filling a contact hole with a metal film having a better filling characteristic than that of aluminum, for example a tungsten film, which is used as a contact plug for electrical connection between a metal line and a lower structure.
FIG. 1 is a cross-sectional view showing a conventional metal wiring of a semiconductor device.
First, a metal line 3 is formed over a semiconductor substrate 1. In addition, barrier metal layers 2, 4 are formed over and under each of metal lines. Moreover, an interlayer insulating film 5 is formed over the resulting structure including the metal line 3. In addition, the interlayer insulting film 5 is selectively etched to form a contact hole (not shown) exposing the metal line 3. After that, barrier metal layer 6 is formed on the inner surface of the contact hole (not shown). After that, the contact hole is filled with Tungsten (W), and the W material is polished by chemical mechanical polishing (CMP) until the interlayer insulating film 5 is exposed, to form a contact plug 7. In the etching process for the contact hole, the metal line 3 acts as an etching stop film.
Next, an aluminum film 9 is formed over the contact plug 7. Then, a photoresist pattern (not shown) is formed over the aluminum film 9. In addition, barrier metal layers 8, 10 are formed over and under the aluminum film 9. After that, the aluminum film 9 is etched using the photoresist pattern (not shown) as an etch barrier to form an Al line that is electrically connected to the metal line 3 via the contact plug 7. Here, the etching process for the aluminum film 9 is generally performed with a plasma etching method using a mixture gas of C12 and BC13.
Thereafter, an interlayer insulating film 11 is formed over the aluminum film 9. Moreover, the interlayer insulting film 11 is selectively etched to form a contact hole (not shown) exposing the aluminum film 9. After that, barrier metal layer 12 is formed on the inner surface of the contact hole (not shown). After that, the contact hole is filled with W material, and the W material is polished until the interlayer insulating film 11 is exposed, to form a contact plug 13. In the etching process for the contact hole, the aluminum film 9 acts as an etching stop film.
Next, as a metal line, an aluminum film 15 is formed over the entire surface including the contact plug 13. In addition, barrier metal layers 14, 16 are formed over and under the aluminum film 15.
According to the conventional method for forming a metal wiring, the metal lines 3, 9 and 15 act as the etch stop film during the etching process for a contact hole. In this case, an etching difference can occur depending upon a degree of oxide uniformity within a wafer.
That is, if the oxide uniformity within the wafer is poor, an edge part of the wafer is not etched sufficient to secure low resistance between metals, and therefore electric connection failure may occur. As a result, AC characteristics of a device, or, timing-related characteristics such as tRCD (a delay time from the time when a row address strobe signal is enabled to the time when a column address strobe signal is enabled), tRP (a pre-charge timing of a row address signal), and tWR (a write timing) can be deteriorated.
This is most likely to cause a contact failure that the metal contact is not electrically opened, and may cause problems that RC on the device characteristics and speed characteristics become degraded.
Meanwhile, as manufacturing technologies for a semiconductor device progress, there have been many efforts to put more chips in one wafer by improving integration of the semiconductor device.
This makes the minimum line-width according to design rules narrower in order to increase a degree of integration.
Also, a semiconductor device is required to operate faster and to reduce power consumption simultaneously. In order to increase integration, not only sizes of many components in a semiconductor device should be reduced, but also lengths and widths of connecting lines should be reduced.
In addition, resistance of narrow lines should be lowered in order to transmit electrical signals well through the narrow lines inside a semiconductor device. Due to this, researches have been conducted for a manufacturing method not using aluminum, but using copper, which has good electrical conductivity and lower resistance than aluminum, as a line in a semiconductor device.
However, if copper as a metal line, a method so-called “Damascene” is employed due to difficulties in etching copper compared with aluminum. The Damascene process is a technology that an insulation film is etched to form a trench, and then the trench is filled with conductive material in order to form a metal line.
On the other hand, in case of using a copper film to form a metal line, there is a merit that stability for the metal line can be secured during a following CMP process. In addition, since copper is diffused very quickly through interstitial sites, the copper is surrounded by a barrier layer so-called “diffusion stop film”.
FIG. 2 is a cross-sectional view illustrating a conventional copper line.
First, an etch stop film is formed over a lower structure, such as a semiconductor substrate 50 having memory cells, through a series of semiconductor manufacturing processes. Next, an interlayer insulating film so-called Inter Layer Dielectric (ILD) or Inter Metal Dielectric (IMD) is formed over the etch stop film. Thereafter, the interlayer insulating film is selectively etched to form a trench or via-type contact hole (not shown).
Next, the contact hole is filled with conductive material such as W material to form a contact plug 51. After that, a copper line 52 which is connected to the contact plug 52 is formed thereon. Next, a contact plug 53, which is made of W, and a first metal line 54, which is made of Aluminum (Al) are formed over the copper line 52, successively. Thereafter, a contact plug 55, which is made of W, and a second metal line 56, which is made of Al are, in order, formed over the first metal line 54.
Recently, as integration increases, it becomes hard to form all metal line on the same level. Therefore, there have been proposed a technique, Multi-Layer Metallization (MLM), that increases integration by doubling or tripling metal lines using a interlayer insulating layer interposed between the metal lines. In the multi-layer metallization, upper and lower metal lines are electrically connected with each other through a contact, as shown in FIG. 2.
However, the multi-layer metallization technique may cause disconnection between inner connection lines, which may occur when the connection lines are narrower and electro migration (EM) occurs. Thus, a disconnection issue has been an important issue to solve. The EM is a phenomenon that flow of electrons makes atoms consisting of inner connection lines migrate because of the influence of Joule-Heating when current flows in the inner connection lines.
If potential difference is generated in a conductor, the electric potential will force electrons to move from a cathode to an anode while it will force atomic nucleus, a positive charge, to move to a cathode, which is referred to static electricity force.
At this moment, when electrons moving to an anode collide with the atomic nucleus, the collided atomic nucleus will get a force to move to the anode. This force is referred to electron wind force. That is, as a device is highly integrated, lines with higher current density are used in the device, and thus become vulnerable points to the EM.
Here, the degree of EM becomes different depending on a kind of a line used, line-width, thickness, contact structure, operating current density, operating temperature, and many other factors. Currently manufactured DRAMs mainly use aluminum lines, while CPUs or logic gates mainly use copper lines in order to improve reliability of a line against EM effect, reduce resistance of a line and reduce RC delay.
However, since copper has a high coefficient of thermal expansion, copper may suffer thermal expansion at a high temperature and migration can occur due to heat generated on the lower metal lines, as shown in (A) of FIG. 2. In this case, a contact failure occurs since the metal contact, connecting lower and upper metal lines, is not opened as shown in (B) of FIG. 2.
Such migration may occur mainly in interfaces between the copper and a first metal contact or between the copper and a second metal contact. Particularly, as copper ratio in the conductive layer increases, it is more likely to suffer thermal expansion, and thus migration of the copper is tend to be more intensive.
For this reason, empty spaces so-called void are generated between a metal line and a metal contact. These voids may increase resistance of copper, or may cause stress migration (SM) and the electro migration to entail a problem that lowers reliability of a device. To solve this problem, the thickness of a copper metal line can be reduced. However, in this case, since resistance of the copper will increase, there is no merit to use copper as a metal.